Date of Award
2022-08-01
Degree Name
Doctor of Philosophy
Department
Computer Science
Advisor(s)
Eric A. Freudenthal
Abstract
A variety of computer systems from HPC to mobile systems are power limited and performance sensitive. These systems use very similar components at different scales. Dynamic Voltage and Frequency Scaling (DVFS) features enable modulation of CPU performance and efficiency characteristics to power, energy and timing requirements.Programs have a variety of computational characteristics. If a CPU subsystem substantially limits a particular programâ??s execution progress, that programâ??s throughput will vary proportionally with the subsystemâ??s clock frequency. In contrast, if a CPU subsystem does not substantially limit throughput, the impact of a change in its clock frequency will result in a diminimus change in a program's execution time. Dynamic Voltage and Frequency Scaling (DVFS) power domains commonly encompass entire cores and their associated caches. This work indicates that moderate energy efficiency gains may be attainable for some programs if limiting and non-limiting subsystemsâ?? (D)VFS domains are decoupled. This decoupling enables tuning of their relative performance to application characteristics. Widely used simulation and modeling tools were extended to support this exploratory research.
Language
en
Provenance
Received from ProQuest
Copyright Date
2022-08
File Size
55 p.
File Format
application/pdf
Rights Holder
David Daniel Pruitt
Recommended Citation
Pruitt, David Daniel, "Investigating the Effects of Decoupling Cache and Core Speed on Power, Throughput, and Energy" (2022). Open Access Theses & Dissertations. 3621.
https://scholarworks.utep.edu/open_etd/3621