Date of Award

2014-01-01

Degree Name

Master of Science

Department

Computer Science

Advisor(s)

Shirley V. Moore

Abstract

This research is part of a co-design project that has the goal of designing hardware systems to match application requirements and efficiently mapping applications to hardware. This thesis is focused on optimizing the platform cache memory hierarchy configuration. To determine application requirements, we characterize the application using platform- independent locality metrics. Next we use locality data and an analytical model to predict cache an application performance of sequential versions of application codes for various cache configurations. After using an analytical model to select a candidate set of cache memory hierarchy configurations, we used architectural simulation to test the selection for the targeted systems.

Language

en

Provenance

Received from ProQuest

File Size

65 pages

File Format

application/pdf

Rights Holder

Sonish Shrestha

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